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You In Here : //proc/self/root/usr/include/pgsql/ typedef int slock_t; #define TAS(lock) tas(lock) #endif /* __m32r__ */ #if defined(__sh__) /* Renesas' SuperH */ #define HAS_TEST_AND_SET typedef unsigned char slock_t; #define TAS(lock) tas(lock) static __inline__ int tas(volatile slock_t *lock) { register int _res; /* * This asm is coded as if %0 could be any register, but actually SuperH * restricts the target of xor-immediate to be R0. That's handled by * the "z" constraint on _res. */ __asm__ __volatile__( " tas.b @%2 \n" " movt %0 \n" " xor #1,%0 \n" : "=z"(_res), "+m"(*lock) : "r"(lock) : "memory", "t"); return _res; } #endif /* __sh__ */ /* These live in s_lock.c, but only for gcc */ #if defined(__m68k__) && !defined(__linux__) /* non-Linux Motorola 68k */ #define HAS_TEST_AND_SET typedef unsigned char slock_t; #endif #endif /* defined(__GNUC__) || defined(__INTEL_COMPILER) */ /* * --------------------------------------------------------------------- * Platforms that use non-gcc inline assembly: * --------------------------------------------------------------------- */ #if !defined(HAS_TEST_AND_SET) /* We didn't trigger above, let's try here */ #if defined(USE_UNIVEL_CC) /* Unixware compiler */ #define HAS_TEST_AND_SET typedef unsigned char slock_t; #define TAS(lock) tas(lock) asm int tas(volatile slock_t *s_lock) { /* UNIVEL wants %mem in column 1, so we don't pg_indent this file */ %mem s_lock pushl %ebx movl s_lock, %ebx movl $255, %eax lock xchgb %al, (%ebx) popl %ebx } #endif /* defined(USE_UNIVEL_CC) */ #if defined(__alpha) || defined(__alpha__) /* Tru64 Unix Alpha compiler */ /* * The Tru64 compiler doesn't support gcc-style inline asm, but it does * have some builtin functions that accomplish much the same results. * For simplicity, slock_t is defined as long (ie, quadword) on Alpha * regardless of the compiler in use. LOCK_LONG and UNLOCK_LONG only * operate on an int (ie, longword), but that's OK as long as we define * S_INIT_LOCK to zero out the whole quadword. */ #define HAS_TEST_AND_SET typedef unsigned long slock_t; #include #define S_INIT_LOCK(lock) (*(lock) = 0) #define TAS(lock) (__LOCK_LONG_RETRY((lock), 1) == 0) #define S_UNLOCK(lock) __UNLOCK_LONG(lock) #endif /* __alpha || __alpha__ */ #if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */ /* * HP's PA-RISC * * See src/backend/port/hpux/tas.c.template for details about LDCWX. Because * LDCWX requires a 16-byte-aligned address, we declare slock_t as a 16-byte * struct. The active word in the struct is whichever has the aligned address; * the other three words just sit at -1. * * When using gcc, we can inline the required assembly code. */ #define HAS_TEST_AND_SET typedef struct { int sema[4]; } slock_t; #define TAS_ACTIVE_WORD(lock) ((volatile int *) (((uintptr_t) (lock) + 15) & ~15)) #if defined(__GNUC__) static __inline__ int tas(volatile slock_t *lock) { volatile int *lockword = TAS_ACTIVE_WORD(lock); register int lockval; __asm__ __volatile__( " ldcwx 0(0,%2),%0 \n" : "=r"(lockval), "+m"(*lockword) : "r"(lockword) : "memory"); return (lockval == 0); } #endif /* __GNUC__ */ #define S_UNLOCK(lock) (*TAS_ACTIVE_WORD(lock) = -1) #define S_INIT_LOCK(lock) \ do { \ volatile slock_t *lock_ = (lock); \ lock_->sema[0] = -1; \ lock_->sema[1] = -1; \ lock_->sema[2] = -1; \ lock_->sema[3] = -1; \ } while (0) #define S_LOCK_FREE(lock) (*TAS_ACTIVE_WORD(lock) != 0) #endif /* __hppa || __hppa__ */ #if defined(__hpux) && defined(__ia64) && !defined(__GNUC__) /* * HP-UX on Itanium, non-gcc compiler * * We assume that the compiler enforces strict ordering of loads/stores on * volatile data (see comments on the gcc-version earlier in this file). * Note that this assumption does *not* hold if you use the * +Ovolatile=__unordered option on the HP-UX compiler, so don't do that. * * See also Implementing Spinlocks on the Intel Itanium Architecture and * PA-RISC, by Tor Ekqvist and David Graves, for more information. As of * this writing, version 1.0 of the manual is available at: * http://h21007.www2.hp.com/portal/download/files/unprot/itanium/spinlocks.pdf */ #define HAS_TEST_AND_SET typedef unsigned int slock_t; #include #define TAS(lock) _Asm_xchg(_SZ_W, lock, 1, _LDHINT_NONE) /* On IA64, it's a win to use a non-locking test before the xchg proper */ #define TAS_SPIN(lock) (*(lock) ? 1 : TAS(lock)) #endif /* HPUX on IA64, non gcc */ #if defined(__sgi) /* SGI compiler */ /* * SGI IRIX 5 * slock_t is defined as a unsigned long. We use the standard SGI * mutex API. * * The following comment is left for historical reasons, but is probably * not a good idea since the mutex ABI is supported. * * This stuff may be supplemented in the future with Masato Kataoka's MIPS-II * assembly from his NECEWS SVR4 port, but we probably ought to retain this * for the R3000 chips out there. */ #define HAS_TEST_AND_SET typedef unsigned long slock_t; #include "mutex.h" #define TAS(lock) (test_and_set(lock,1)) #define S_UNLOCK(lock) (test_then_and(lock,0)) #define S_INIT_LOCK(lock) (test_then_and(lock,0)) #define S_LOCK_FREE(lock) (test_then_add(lock,0) == 0) #endif /* __sgi */ #if defined(sinix) /* Sinix */ /* * SINIX / Reliant UNIX * slock_t is defined as a struct abilock_t, which has a single unsigned long * member. (Basically same as SGI) */ #define HAS_TEST_AND_SET #include "abi_mutex.h" typedef abilock_t slock_t; #define TAS(lock) (!acquire_lock(lock)) #define S_UNLOCK(lock) release_lock(lock) #define S_INIT_LOCK(lock) init_lock(lock) #define S_LOCK_FREE(lock) (stat_lock(lock) == UNLOCKED) #endif /* sinix */ #if defined(_AIX) /* AIX */ /* * AIX (POWER) */ #define HAS_TEST_AND_SET #include typedef int slock_t; #define TAS(lock) _check_lock((slock_t *) (lock), 0, 1) #define S_UNLOCK(lock) _clear_lock((slock_t *) (lock), 0) #endif /* _AIX */ /* These are in sunstudio_(sparc|x86).s */ #if defined(sun3) /* Sun3 */ #define HAS_TEST_AND_SET typedef unsigned char slock_t; #endif #if defined(__SUNPRO_C) && (defined(__i386) || defined(__x86_64__) || defined(__sparc__) || defined(__sparc)) #define HAS_TEST_AND_SET #if defined(__i386) || defined(__x86_64__) || defined(__sparcv9) || defined(__sparcv8plus) typedef unsigned int slock_t; #else typedef unsigned char slock_t; #endif extern slock_t pg_atomic_cas(volatile slock_t *lock, slock_t with, slock_t cmp); #define TAS(a) (pg_atomic_cas((a), 1, 0) != 0) #endif #ifdef WIN32_ONLY_COMPILER typedef LONG slock_t; #define HAS_TEST_AND_SET #define TAS(lock) (InterlockedCompareExchange(lock, 1, 0)) #define SPIN_DELAY() spin_delay() /* If using Visual C++ on Win64, inline assembly is unavailable. * Use a _mm_pause intrinsic instead of rep nop. */ #if defined(_WIN64) static __forceinline void spin_delay(void) { _mm_pause(); } #else static __forceinline void spin_delay(void) { /* See comment for gcc code. Same code, MASM syntax */ __asm rep nop; } #endif #endif #endif /* !defined(HAS_TEST_AND_SET) */ /* Blow up if we didn't have any way to do spinlocks */ #ifndef HAS_TEST_AND_SET #error PostgreSQL does not have native spinlock support on this platform. To continue the compilation, rerun configure using --disable-spinlocks. However, performance will be poor. Please report this to pgsql-bugs@postgresql.org. #endif #else /* !HAVE_SPINLOCKS */ /* * Fake spinlock implementation using semaphores --- slow and prone * to fall foul of kernel limits on number of semaphores, so don't use this * unless you must! The subroutines appear in spin.c. */ typedef int slock_t; extern bool s_lock_free_sema(volatile slock_t *lock); extern void s_unlock_sema(volatile slock_t *lock); extern void s_init_lock_sema(volatile slock_t *lock); extern int tas_sema(volatile slock_t *lock); #define S_LOCK_FREE(lock) s_lock_free_sema(lock) #define S_UNLOCK(lock) s_unlock_sema(lock) #define S_INIT_LOCK(lock) s_init_lock_sema(lock) #define TAS(lock) tas_sema(lock) #endif /* HAVE_SPINLOCKS */ /* * Default Definitions - override these above as needed. */ #if !defined(S_LOCK) #define S_LOCK(lock) \ do { \ if (TAS(lock)) \ s_lock((lock), __FILE__, __LINE__); \ } while (0) #endif /* S_LOCK */ #if !defined(S_LOCK_FREE) #define S_LOCK_FREE(lock) (*(lock) == 0) #endif /* S_LOCK_FREE */ #if !defined(S_UNLOCK) #define S_UNLOCK(lock) (*((volatile slock_t *) (lock)) = 0) #endif /* S_UNLOCK */ #if !defined(S_INIT_LOCK) #define S_INIT_LOCK(lock) S_UNLOCK(lock) #endif /* S_INIT_LOCK */ #if !defined(SPIN_DELAY) #define SPIN_DELAY() ((void) 0) #endif /* SPIN_DELAY */ #if !defined(TAS) extern int tas(volatile slock_t *lock); /* in port/.../tas.s, or * s_lock.c */ #define TAS(lock) tas(lock) #endif /* TAS */ #if !defined(TAS_SPIN) #define TAS_SPIN(lock) TAS(lock) #endif /* TAS_SPIN */ /* * Platform-independent out-of-line support routines */ extern void s_lock(volatile slock_t *lock, const char *file, int line); /* Support for dynamic adjustment of spins_per_delay */ #define DEFAULT_SPINS_PER_DELAY 100 extern void set_spins_per_delay(int shared_spins_per_delay); extern int update_spins_per_delay(int shared_spins_per_delay); #endif /* S_LOCK_H */